02 Mar 2026 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
03 Mar 2026 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
04 Mar 2026 Quartus® Prime Software: Foundation You will learn how to use the Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
05 Mar 2026 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for FPGAs using Alteras Qsys system-level integration tool. Sign up
09 Mar 2026 t/m 10 Mar 2026 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
12 Mar 2026 Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Quartus® Prime Software. Sign up
13 Apr 2026 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
14 Apr 2026 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
15 Apr 2026 Quartus® Prime Software: Foundation You will learn how to use the Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
15 Apr 2026 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for FPGA devices using the Platform Designer system integration tool (formerly known as Qsys). Sign up
20 Apr 2026 t/m 21 Apr 2026 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
22 Apr 2026 Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Quartus® Prime Software. Sign up
11 May 2026 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
12 May 2026 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
13 May 2026 Quartus® Prime Software: Foundation You will learn how to use the Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
14 May 2026 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for FPGA devices using the Platform Designer system integration tool (formerly known as Qsys). Sign up
18 May 2026 t/m 19 May 2026 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
20 May 2026 Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Quartus® Prime Software. Sign up
