06 May 2024 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
07 May 2024 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
08 May 2024 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for Altera FPGAs using Alteras Qsys system-level integration tool. Sign up
09 May 2024 Intel® Quartus® Prime Software: Foundation You will learn how to use the Intel® Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
20 May 2024 t/m 21 May 2024 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
22 May 2024 Intel® Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Intel® Quartus® Prime Software. Sign up
03 Jun 2024 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
04 Jun 2024 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
05 Jun 2024 Intel® Quartus® Prime Software: Foundation You will learn how to use the Intel® Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
06 Jun 2024 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for Altera FPGAs using Alteras Qsys system-level integration tool. Sign up
17 Jun 2024 t/m 18 Jun 2024 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
19 Jun 2024 Intel® Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Intel® Quartus® Prime Software. Sign up