22 May 2019 Intel® Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Intel® Quartus® Prime Software. Sign up
10 Jun 2019 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
11 Jun 2019 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
12 Jun 2019 Intel® Quartus® Prime Software: Foundation You will learn how to use the Intel® Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
13 Jun 2019 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for Intel® FPGA devices using the Platform Designer system integration tool (formerly known as Qsys). Sign up
17 Jun 2019 t/m 18 Jun 2019 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
19 Jun 2019 Intel® Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Intel® Quartus® Prime Software. Sign up
01 Jul 2019 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
02 Jul 2019 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
03 Jul 2019 Intel® Quartus® Prime Software: Foundation You will learn how to use the Intel® Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
04 Jul 2019 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for Intel® FPGA devices using the Platform Designer system integration tool (formerly known as Qsys). Sign up
08 Jul 2019 t/m 09 Jul 2019 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
10 Jul 2019 Intel® Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Intel® Quartus® Prime Software. Sign up
11 Jul 2019 Designing with an ARM-based SoC Learn to design a system containing the ARM® Cortex®-A9 Hard Processor System (HPS) on Cyclone® V, Arria® V, & Arria 10 SoCs. Sign up
05 Aug 2019 Introduction to VHDL With this training, a good fundament will be created for the usage of VHDL for designing complex digital designs. Sign up
06 Aug 2019 Advanced VHDL Design Techniques During the training the base knowledge will be refreshed and new VHDL aspects will be adressed. Sign up
07 Aug 2019 Intel® Quartus® Prime Software: Foundation You will learn how to use the Intel® Quartus® Prime software to develop an FPGA design from initial design to device programming Sign up
08 Aug 2019 Introduction to the Platform Designer System Integration Tool (Qsys) This class will teach you how to quickly build designs for Altera FPGAs using Alteras Qsys system-level integration tool. Sign up
12 Aug 2019 t/m 13 Aug 2019 Designing with Nios® II Processor This course will teach you to embed a Nios® II 32-bit microprocessor soft core into your FPGA design. Sign up
14 Aug 2019 Intel® Quartus® Prime Software: Timing Analysis with Timing Analyzer You will learn how to constrain & analyze a design for timing using the timing analyzer in the Intel® Quartus® Prime Software. Sign up
